This application relates to the operation of re-programmable non-volatile memory systems such as semiconductor flash memory, and more specifically, to systems and methods of providing power to multiple memory dies in memory arrays in such systems.
Solid-state memory capable of nonvolatile storage of charge, particularly in the form of EEPROM and flash EEPROM packaged as a small form factor card, has recently become the storage of choice in a variety of mobile and handheld devices, notably information appliances and consumer electronics products. Unlike RAM (random access memory) that is also solid-state memory, flash memory is non-volatile, and retains its stored data even after power is turned off. Also, unlike ROM (read only memory), flash memory is rewritable similar to a disk storage device. In spite of the higher cost, flash memory is increasingly being used in mass storage applications.
Flash EEPROM is similar to EEPROM (electrically erasable and programmable read-only memory) in that it is a non-volatile memory that can be erased and have new data written or “programmed” into their memory cells. Both utilize a floating (unconnected) conductive gate, in a field effect transistor structure, positioned over a channel region in a semiconductor substrate, between source and drain regions. A control gate is then provided over the floating gate. The threshold voltage characteristic of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, for a given level of charge on the floating gate, there is a corresponding voltage (threshold) that must be applied to the control gate before the transistor is turned “on” to permit conduction between its source and drain regions. Flash memory such as Flash EEPROM allows entire blocks of memory cells to be erased at the same time.
The floating gate can hold a range of charges and therefore can be programmed to any threshold voltage level within a threshold voltage window. The size of the threshold voltage window is delimited by the minimum and maximum threshold levels of the device, which in turn correspond to the range of the charges that can be programmed onto the floating gate. The threshold window generally depends on the memory device's characteristics, operating conditions and history. Each distinct, resolvable threshold voltage level range within the window may, in principle, be used to designate a definite memory state of the cell.
In addition to flash memory, other forms of nonvolatile memory may be used in nonvolatile memory systems. For example Ferroelectric RAM (FeRAM, or FRAM) uses a ferroelectric layer to record data bits by applying an electric field that orients the atoms in a particular area with an orientation that indicates whether a “1” or a “0” is stored. Magnetoresistive RAM (MRAM) uses magnetic storage elements to store data bits. Phase-Change memory (PCME, or PRAM) such as Ovonic Unified Memory (OUM) uses phase changes in certain materials to record data bits. Various other nonvolatile memories are also in use or proposed for use in nonvolatile memory systems. Nonvolatile memories may be planar, formed along a surface of a substrate (e.g. a Silicon wafer) or may be three dimensional (3D), extending up from a surface of a substrate with memory cells formed at different levels.
Nonvolatile memory systems, such as flash memory systems are commonly provided in the form of a memory card or flash drive that is removably connected with a variety of hosts such as a personal computer, a camera or the like, but may also be embedded within such host systems. When writing data to the memory, the host typically assigns unique logical addresses to sectors, clusters or other units of data within a continuous virtual address space of the memory system. Like a disk operating system (DOS), the host writes data to, and reads data from, addresses within the logical address space of the memory system. A memory controller is typically provided within the memory system to translate logical addresses received from the host into physical addresses within the memory array, where the data are actually stored, and then keeps track of these address translations. The memory controller may perform a variety of other functions also.
It is common for a memory system to receive a power supply from a host. For example, a USB connector includes a pin that provides power from a host to a nonvolatile memory system at 5 volts. Other interfaces similarly allow a memory system to receive electrical power from an external source such as a host. The externally supplied power may be passed to a Power Management Circuit (PMC) which manages power supplied to components of the memory system. Power may be supplied to different components at different voltages and with different current needs. The current available from a host may be limited so that if the memory system demand exceeds the current limit the supply voltage drops. A memory die may be unable to function when the voltage drops outside a specified supply voltage range. Such a drop in voltage may be detected and may be treated as a power-down, or power-off condition. It is generally desirable to manage power in a manner that avoids drops in voltage that would affect memory system operation, or would cause an unnecessary event such as a power-down.